1. Field of the Invention
Embodiments of the invention relate to integrated circuits, and more particularly, in one or more embodiments, to inter-chip interfaces between integrated circuits.
2. Description of the Related Art
In many electronic systems, electronic data is communicated between electronic components. In certain applications, multi-element electronic data is transmitted from one component to another. Such a data transmission may involve transmitting a plurality of signals simultaneously from a transmitting component to a receiving component via parallel channels. The signals may be processed at the receiving component to be compatible with a particular protocol.
When a plurality of signals are simultaneously transmitted between two components, crosstalk and/or simultaneous switching output (SSO) noise can occur due to simultaneous processing of multiple signals within a relatively small space. Crosstalk occurs when energy on one channel induces voltages and/or currents on a neighboring channel through capacitive and/or inductive coupling, respectively. SSO noise occurs when noise is coupled between channels through a power supply network. Depending on the relative timing of transitions on each channel, crosstalk and SSO noise may impact either or both of the magnitude and timing of the signal on the neighboring channel.
As the frequency of data transmission rates increases, crosstalk and SSO noise may further adversely affect the quality of signals, resulting in errors. Thus, there is a need to provide a scheme to reduce or minimize crosstalk and SSO noise in multi-element data transmission.